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DATA SHEET
MOS INTEGRATED CIRCUIT
PD16877
MONOLITHIC QUAD H-BRIDGE DRIVER CIRCUIT
DESCRIPTION
The PD16877 is monolithic quad H-bridge driver LSI which uses power MOSFETs in the output stages. By using the MOS process, this driver IC has substantially improved saturation voltage and power consumption as compared with conventional driver circuits using bipolar transistors. By eliminating the charge pump circuit, the current during power-OFF is drastically decreased. In addition, a low-voltage malfunction prevention circuit is also provided that prevents the IC from malfunctioning when the supply voltage drops. As the package, a 24-pin plastic TSSOP is adopted to enable the creation of compact, slim application sets. This driver IC can drive two stepping motor at the same time, and is ideal for driving stepping motors in the lens of a camcorder.
FEATURES
Four H bridge circuits employing power MOSFETs Low current consumption by eliminating charge pump VM pin current when power-OFF: 10 A MAX. VDD pin current: 10 A MAX. Input logic frequency: 100 kHz 3-V power supply Minimum operating supply voltage: 2.5 V Low voltage malfunction prevention circuit 24-pin plastic TSSOP (5.72 mm (225))
ORDERING INFORMATION
Part Number Package 24-pin plastic TSSOP (5.72 mm (225))
PD16877MA-6A5
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. S13964EJ1V0DS00 (1st edition) Date Published March 2000 N CP(K) Printed in Japan
(c)
2000
PD16877
ABSOLUTE MAXIMUM RATINGS (TA = 25C)
When mounted on a glass epoxy board (10 cm x 10 cm x 1 mm, 15% copper foil)
Parameter Control block supply voltage Output block supply voltage Input voltage Output terminal voltage Output current ID(pulse) Power consumption Peak junction temperature Storage temperature range PT TCH(MAX) Tstg Symbol VDD VM VIN VOUT ID(DC) DC PW 10 ms, Duty 5% Condition Rating -0.5 to +6.0 -0.5 to +6.0 -0.5 to VDD + 0.5 6.2 0.3 0.7 0.7 150 -55 to +150 Unit V V V V A/ch A/ch W C C
RECOMMENDED OPERATING CONDITIONS
When mounted on a glass epoxy board (10 cm x 10 cm x 1 mm, 15% copper foil)
Parameter Control block supply voltage Output block supply voltage Output current Operating frequency Operating temperature range Peak junction temperature Symbol VDD VM ID(DC) fIN TA TCH(MAX) DC IN, EN terminal -10 Condition MIN. 2.5 2.7 -0.2 TYP. MAX. 5.5 5.5 +0.2 100 85 125 Unit V V A kHz C C
CHARACTERISTICS (Unless otherwise specified, VDD = VM = 3 V, TA = 25C)
Parameter Off state VM pin current VDD pin current High level input current Low level input current Input pull down resistance High level input voltage Low level input voltage H-bridge ON resistance Symbol IM(OFF) IDD IIH IIL RIND VIH VIL RON 2.5 V VDD 5.5 V 2.5 V VM, VDD 5.5 V Upper + lower VM = 5 V -10C TA +85C VM = 3 V -10C TA +85C 0.8 Condition All control terminal: L level All control terminal: L level VIN = VDD VIN = 0 V -1.0 50 0.7 x VDD -3.0 200 VDD+0.3 0.3 x VDD 3.0 MIN. TYP. MAX. 10 10 0.06 Unit
A A
mA
A
k V V V
VDDS1 Low voltage malfunction prevention circuit operating voltage VDDS2 H bridge output turn-on time H bridge output turn-off time H bridge output rise time H bridge output fall time tONH tOFFH tr tf
2.5
0.65 0.7
2.5 20 0.5 1.0 200
V
s s s
ns
RM = 20 Figure 1
0.2 0.1 0.4 70
2
Data Sheet S13964EJ1V0DS00
PD16877
Figure 1. Switching time condition
100% 50% VIN 0% tONH tOFFH 100% 90% 50% ID 0% tf 10% -10% -50% -90% tr -100% -50% -90% tf 50% 10% -10% tr The current flowing in the direction from OUT_A to OUT_B is assumed to be (+). tONH tOFFH 100% 90% 50%
FUNCTION TABLE
Channel 1
EN1 H H L L IN1 L H L H OUT1A H L Z Z OUT1B L H Z Z
Channel 2
EN2 H H L L IN2 L H L H OUT2A H L Z Z OUT2B L H Z Z
Channel 3
EN3 H H L L IN3 L H L H OUT3A H L Z Z OUT3B L H Z Z
Channel 4
EN4 H H L L IN4 L H L H OUT4A H L Z Z OUT4B L H Z Z
H: High-level, L: Low-level, Z: High impedance
Data Sheet S13964EJ1V0DS00
3
PD16877
PIN CONNECTION
VM1 OUT1A PGND OUT2A OUT3A PGND OUT4A VM4 IN1 EN1 IN2 EN2 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VDD OUT1B PGND OUT2B VM23 OUT3B PGND OUT4B EN4 IN4 EN3 IN3
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12
Pin name VM1 OUT1A PGND OUT2A OUT3A PGND OUT4A VM4 IN1 EN1 IN2 EN2
Pin function Output block supply voltage input terminal Output terminal Ground terminal Output terminal Output terminal Ground terminal Output terminal Output block supply voltage input terminal Control terminal (channel 1) Enable terminal (channel 1) Control terminal (channel 2) Enable terminal (channel 2)
Pin No. 13 14 15 16 17 18 19 20 21 22 23 24
Pin name IN3 EN3 IN4 EN4 OUT4B PGND OUT3B VM23 OUT2B PGND OUT1B VDD
Pin function Control terminal (channel 3) Enable terminal (channel 3) Control terminal (channel 4) Enable terminal (channel 4) Output terminal Ground terminal Output terminal Output block supply voltage input terminal Output terminal Ground terminal Output terminal Control block supply voltage input terminal
4
Data Sheet S13964EJ1V0DS00
PD16877
BLOCK DIAGRAM
24 Low volatge malfunction prevention circuit IN1 9 EN1 10 Control circuit (1) H-bridge (1) OUT1B 23 PGND 3 VM23 20 IN2 11 EN2 12 Control circuit (2) H-bridge (2) OUT2B 21 PGND OUT2A 4 VDD
VM1 1 OUT1A 2
22
IN3 13 EN3 14 Control circuit (3) H-bridge (3)
OUT3A 5 OUT3B 19 PGND 6 VM4 8
IN4 15 EN4 16 Control circuit (4) H-bridge (4)
OUT4A 7 OUT4B 17 PGND 18
Remark Plural terminal (VM, PGND) is not only 1 terminal and connect all terminals.
Data Sheet S13964EJ1V0DS00
5
PD16877
TYPICAL CHARACTERISTICS
PT vs. TA characteristics 1.0
OFF state VM Pin current IM (OFF) ( A)
IM (OFF) vs. VM characteristics 35 30 25 20 15 10 5 0 TA = 25C control : "L"
Total power dissipation PT (W)
0.8 0.7W 0.6 178C/W 0.4
0.2
0 -10 0
20
40
60
80
100
120
1
2
3
4
5
6
Ambient temperature TA (C)
Output block supply voltage VM (V)
IDD vs. VDD characteristics 0.7 0.6
VDD pin current IDD ( A)
IIH, IIL vs. VDD characteristics TA = 25C 60
Input current IIH IIL (A)
TA = 25C control : "L"
0.5 0.4 0.3 0.2 0.1 0
50 40 IIH 30 20 10 IIL 0
1
2
3
4
5
6
1
2
3
4
5
6
Control block supply voltage VDD (V) VIH, VIL vs. VDD characteristics
Control block supply voltage VDD (V) VDDS vs. VM characteristics
Low voltage detection voltage VDDS (V)
TA = 25C 4.0
Input voltage VIH, VIL (V)
TA = 25C 2.0 VDD (L 1.5 VDD (H 1.0 L) H)
3.0 VIH, VIL 2.0
1.0
0.5
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Control block supply voltage VDD (V)
Output block supply voltage VM (V)
6
Data Sheet S13964EJ1V0DS00
PD16877
RON vs. VM characteristics 1.0
H-bridge ON resistance RON ()
tONH, tOFFH vs. VM characteristics TA = 25C 0.8 tONH 0.6
3.0 2.5 2.0 1.5 1.0 0.5 0
H-bridge Output turn-on time tONH (s) H-bridge Output turn-off time tOFFH ( s)
TA = 25C
0.4 tOFFH 0.2
1
2
3
4
5
6
0
1
2
3
4
5
6
Output block supply voltage VM (V)
Output block supply voltage VM (V)
tr, tf vs. VM characteristics 1.0 TA = 25C
H-bridge Output rise time tr ( s) H-bridge Output fall time tf ( s)
0.8
0.6 tr 0.1
0.2 tf 0 1 2 3 4 5 6
Output block supply voltage VM (V)
Data Sheet S13964EJ1V0DS00
7
PD16877
STANDARD CONNECTION EXAMPLE
VDD = VM = 2.7 V to 5.5 V DC/DC CONVERTER
1 to 10 F
1 to 10 F
VM4 VDD
VM2 3
IN1 EN1 IN2 EN2 IN3 EN3 IN4 EN4
low voltage malfunction prevention circuit
VM4 OUT1A H-bridge OUT1B (1) PGND H-bridge OUT2A (2) PGND OUT3A
motor1
OUT2B
CPU
control circuit
level shift circuit
H-bridge OUT3B (3) PGND OUT4A
motor2
H-bridge OUT4B (4) PGND
8
Data Sheet S13964EJ1V0DS00
PD16877
PACKAGE DIMENSION
24-PIN PLASTIC TSSOP (5.72 mm (225))
24 13 detail of lead end F G R
P
L S
1
12
E
A A' S
H I J
C D M
M
K B
N
S
NOTE Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition.
ITEM A A' B C D E F G H I J K L M N P R S
MILLIMETERS 6.650.10 6.50.1 0.575 0.5 (T.P.) 0.220.05 0.10.05 1.2 MAX. 1.00.05 6.40.1 4.40.1 1.00.1 0.1450.025 0.5 0.10 0.08 3+5 -3 0.25 0.60.15 S24MA-50-6A5
Data Sheet S13964EJ1V0DS00
9
PD16877
RECOMMENDED SOLDERING CONDITIONS
Solder this product under the following recommended conditions. For soldering methods and conditions other than those recommended, consult NEC. For details of the recommended soldering conditions, refer to information document "Semiconductor Device Mounting Technology Manual".
Recommended Condition Symbol
Soldering Method
Soldering Conditions Package peak temperature: 235C; Time: 30 secs. max. (210C min.); Number of times: 3 times max; Number of day: none; Flux: Rosin-based flux with little chlorine content (chlorine: 0.2Wt% max.) is recommended. Package peak temperature: 215C; Time: 40 secs. max. (200C min.); Number of times: 3 times max.; Number of day: none; Flux: Rosin-based flux with little chlorine content (chlorine: 0.2 Wt% max.) is recommended. Package peak temperature: 260C; Time: 10 secs. max.; Preheating temperature: 120C max.; Number of times: once; Flux: Rosin-based flux with little chlorine content (chlorine: 0.2 Wt% max.) is recommended.
Infrared reflow
IR35-00-3
VPS
VP15-00-3
Wave soldering
WS60-00-1
Caution Do not use two or more soldering methods in combination.
10
Data Sheet S13964EJ1V0DS00
PD16877
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function.
Data Sheet S13964EJ1V0DS00
11
PD16877
* The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. * No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. * NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. * Descriptions of circuits, software, and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software, and information in the design of the customer's equipment shall be done under the full responsibility of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third parties arising from the use of these circuits, software, and information. * While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. * NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance.
M7 98. 8

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